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» Efficient Wire Formats for High Performance Computing
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PPOPP
2009
ACM
16 years 4 months ago
Mapping parallelism to multi-cores: a machine learning based approach
The efficient mapping of program parallelism to multi-core processors is highly dependent on the underlying architecture. This paper proposes a portable and automatic compiler-bas...
Zheng Wang, Michael F. P. O'Boyle
DAC
2008
ACM
16 years 5 months ago
Modeling of failure probability and statistical design of spin-torque transfer magnetic random access memory (STT MRAM) array fo
: Spin-Torque Transfer Magnetic RAM (STT MRAM) is a promising candidate for future universal memory. It combines the desirable attributes of current memory technologies such as SRA...
Jing Li, Charles Augustine, Sayeef S. Salahuddin, ...
DAC
2000
ACM
16 years 5 months ago
High-level simulation of substrate noise generation including power supply noise coupling
Substrate noise caused by large digital circuits will degrade the performance of analog circuits located on the same substrate. To simulate this performance degradation, the total...
Marc van Heijningen, Mustafa Badaroglu, Sté...
DAC
2004
ACM
16 years 5 months ago
An integrated hardware/software approach for run-time scratchpad management
An ever increasing number of dynamic interactive applications are implemented on portable consumer electronics. Designers depend largely on operating systems to map these applicat...
Francesco Poletti, Paul Marchal, David Atienza, Lu...
ICML
2009
IEEE
16 years 4 months ago
Prototype vector machine for large scale semi-supervised learning
Practical data mining rarely falls exactly into the supervised learning scenario. Rather, the growing amount of unlabeled data poses a big challenge to large-scale semi-supervised...
Kai Zhang, James T. Kwok, Bahram Parvin