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» Efficient Wire Formats for High Performance Computing
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CF
2006
ACM
15 years 5 months ago
A nano-scale reconfigurable mesh with spin waves
In this paper, we present a nano-scale reconfigurable mesh that is interconnected with ferromagnetic spin-wave buses. The architecture described here, while requiring the same num...
Mary Mehrnoosh Eshaghian-Wilner, Alexander Khitun,...
DATE
2010
IEEE
168views Hardware» more  DATE 2010»
15 years 4 months ago
A new placement algorithm for the mitigation of multiple cell upsets in SRAM-based FPGAs
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...
Luca Sterpone, Niccolò Battezzati
SIGMOD
2010
ACM
171views Database» more  SIGMOD 2010»
15 years 4 months ago
Variance aware optimization of parameterized queries
Parameterized queries are commonly used in database applications. In a parameterized query, the same SQL statement is potentially executed multiple times with different parameter ...
Surajit Chaudhuri, Hongrae Lee, Vivek R. Narasayya
FPGA
1999
ACM
123views FPGA» more  FPGA 1999»
15 years 4 months ago
Procedural Texture Mapping on FPGAs
Procedural textures can be effectively used to enhance the visual realism of computer rendered images. Procedural textures can provide higher realism for 3-D objects than traditio...
Andy Gean Ye, David M. Lewis
ASAP
2004
IEEE
127views Hardware» more  ASAP 2004»
15 years 3 months ago
A Public-Key Cryptographic Processor for RSA and ECC
We describe a general-purpose processor architecture for accelerating public-key computations on server systems that demand high performance and flexibility to accommodate large n...
Hans Eberle, Nils Gura, Sheueling Chang Shantz, Vi...