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» Efficient Wire Formats for High Performance Computing
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SIGGRAPH
2000
ACM
15 years 4 months ago
The WarpEngine: an architecture for the post-polygonal age
We present the WarpEngine, an architecture designed for realtime image-based rendering of natural scenes from arbitrary viewpoints. The modeling primitives are real-world images w...
Voicu Popescu, John G. Eyles, Anselmo Lastra, Josh...
ICPP
1999
IEEE
15 years 4 months ago
Coherence-Centric Logging and Recovery for Home-Based Software Distributed Shared Memory
The probability of failures in software distributed shared memory (SDSM) increases as the system size grows. This paper introduces a new, efficient message logging technique, call...
Angkul Kongmunvattana, Nian-Feng Tzeng
110
Voted
ANCS
2007
ACM
15 years 3 months ago
Ruler: high-speed packet matching and rewriting on NPUs
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
Tomas Hruby, Kees van Reeuwijk, Herbert Bos
DAC
2005
ACM
15 years 1 months ago
Constraint-aware robustness insertion for optimal noise-tolerance enhancement in VLSI circuits
Reliability of nanometer circuits is becoming a major concern in today’s VLSI chip design due to interferences from multiple noise sources as well as radiation-induced soft erro...
Chong Zhao, Yi Zhao, Sujit Dey
TOG
2008
140views more  TOG 2008»
14 years 11 months ago
Multidimensional adaptive sampling and reconstruction for ray tracing
We present a new adaptive sampling strategy for ray tracing. Our technique is specifically designed to handle multidimensional sample domains, and it is well suited for efficientl...
Toshiya Hachisuka, Wojciech Jarosz, Richard Peter ...