1259 search results - page 3 / 252 » Efficient Wire Formats for High Performance Computing |
EWSN
2004
Springer
15 years 9 months ago
2004
Springer
The efficient subdivision of a sensor network into uniform, mostly non-overlapping clusters of physically close nodes is an important building block in the design of efficient uppe...
88
Voted
CONNECTION
2007
14 years 9 months ago
2007
In physical implementations of associative memory, wiring costs play a significant role in shaping patterns of connectivity. In this study of sparsely-connected associative memory...
71
Voted
ICCD
2001
IEEE
15 years 6 months ago
2001
IEEE
As the operating frequency increases to Giga Hertz and the rise time of a signal is less than or comparable to the time-of-flight delay of a line, it is necessary to consider the...
ICCAD
1994
IEEE
15 years 1 months ago
1994
IEEE
In this paper, we study the simultaneousdriver and wire sizing (SDWS) problem under two objective functions: (i) delay minimization only, or (ii) combined delay and power dissipat...
86
Voted
IEEEPACT
2002
IEEE
15 years 2 months ago
2002
IEEE
Clustering is an effective microarchitectural technique for reducing the impact of wire delays, the complexity, and the power requirements of microprocessors. In this work, we inv...