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» Efficient Wire Formats for High Performance Computing
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ICSE
2004
IEEE-ACM
16 years 4 months ago
Efficient Forward Computation of Dynamic Slices Using Reduced Ordered Binary Decision Diagrams
Dynamic slicing algorithms can greatly reduce the debugging effort by focusing the attention of the user on a relevant subset of program statements. Recently algorithms for forwar...
Xiangyu Zhang, Rajiv Gupta, Youtao Zhang
CSREASAM
2003
15 years 5 months ago
Developing Secure Web Services for Computational Portals
Computational web portals provide uniform access to remote computational resources--hardware, software, and data--by hiding the complexity of the heterogeneous, distributed, high ...
Choon-Han Youn, Marlon E. Pierce, Geoffrey Fox
DCOSS
2006
Springer
15 years 7 months ago
The Virtual Pheromone Communication Primitive
We propose a generic communication primitive designed for sensor networks. Our primitive hides details of network communication while retaining sufficient programmer control over t...
Leo Szumel, John D. Owens
BCS
2008
15 years 5 months ago
Implications of Electronics Technology Trends to Algorithm Design
Scaling of electronics technology has brought us to a pivotal point in the design of computational devices. Technology scaling favours transistors over wires which has led us into...
Daniel Greenfield, Simon W. Moore
IPPS
2010
IEEE
15 years 1 months ago
Highly scalable parallel sorting
Sorting is a commonly used process with a wide breadth of applications in the high performance computing field. Early research in parallel processing has provided us with comprehen...
Edgar Solomonik, Laxmikant V. Kalé