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» Efficient Wire Formats for High Performance Computing
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IPPS
2010
IEEE
15 years 2 months ago
BlobSeer: Bringing high throughput under heavy concurrency to Hadoop Map-Reduce applications
Hadoop is a software framework supporting the Map/Reduce programming model. It relies on the Hadoop Distributed File System (HDFS) as its primary storage system. The efficiency of ...
Bogdan Nicolae, Diana Moise, Gabriel Antoniu, Luc ...
133
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EGH
2004
Springer
15 years 7 months ago
Understanding the efficiency of GPU algorithms for matrix-matrix multiplication
Utilizing graphics hardware for general purpose numerical computations has become a topic of considerable interest. The implementation of streaming algorithms, typified by highly ...
Kayvon Fatahalian, Jeremy Sugerman, Pat Hanrahan
ECCV
2002
Springer
16 years 6 months ago
Real-Time Interactive Path Extraction with on-the-Fly Adaptation of the External Forces
The aim of this work is to propose an adaptation of optimal path based interactive tools for image segmentation (related to Live-Wire [12] and Intelligent Scissors [18] approaches)...
Olivier Gérard, Thomas Deschamps, Myriam Gr...
CCGRID
2001
IEEE
15 years 7 months ago
xBSP: An Efficient BSP Implementation for clan
Virtual Interface Architecture(VIA) is a light-weight protocol for protected user-level zero-copy communication. In spite of high performance of VIA, the previous MPI implementati...
Yang-Suk Kee, Soonhoi Ha
ICCAD
2010
IEEE
141views Hardware» more  ICCAD 2010»
15 years 2 months ago
Local clock skew minimization using blockage-aware mixed tree-mesh clock network
Clock network construction is one key problem in high performance VLSI design. Reducing the clock skew variation is one of the most important objectives during clock network synthe...
Linfu Xiao, Zigang Xiao, Zaichen Qian, Yan Jiang, ...