1259 search results - page 5 / 252 » Efficient Wire Formats for High Performance Computing |
JCP
2006
14 years 11 months ago
2006
Abstract-- This work aims to pave the way for high availability in high-performance computing (HPC) by focusing on efficient redundancy strategies for head and service nodes. These...
DATE
2009
IEEE
15 years 6 months ago
2009
IEEE
Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. For the recently available high definition frame sizes and hi...
DAC
2005
ACM
16 years 19 days ago
2005
ACM
Since across-chip interconnect delays can exceed a clock cycle in nanometer technologies, it has become essential in high performance designs to add flip-flops on wires with multi...
PIMRC
2008
IEEE
15 years 6 months ago
2008
IEEE
— In this paper, the design of a highly efficient and flexibly deployable wireless backhaul is addressed as a promising alternative to the typical wired solutions. To this end, a...
ICCD
2007
IEEE
15 years 8 months ago
2007
IEEE
Our objective was to determine the most energy efficient 64b static CMOS adder architecture, for a range of high-performance delay targets. We examine extensively carry-lookahead ...