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» Efficient Wire Formats for High Performance Computing
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VMV
2004
126views Visualization» more  VMV 2004»
15 years 5 months ago
Top-Down Visual Attention for Efficient Rendering of Task Related Scenes
The perception of a virtual environment depends on the user and the task the user is currently performing in that environment. Models of the human visual system can thus be exploi...
Veronica Sundstedt, Alan Chalmers, Kirsten Cater, ...
SASP
2009
IEEE
291views Hardware» more  SASP 2009»
15 years 11 months ago
FCUDA: Enabling efficient compilation of CUDA kernels onto FPGAs
— As growing power dissipation and thermal effects disrupted the rising clock frequency trend and threatened to annul Moore’s law, the computing industry has switched its route...
Alexandros Papakonstantinou, Karthik Gururaj, John...
NAS
2007
IEEE
15 years 10 months ago
Performance Evaluation of A Load Self-Balancing Method for Heterogeneous Metadata Server Cluster Using Trace-Driven and Syntheti
In cluster-based storage systems, the metadata server cluster must be able to adaptively distribute responsibility for metadata to maintain high system performance and long-term l...
Bin Cai, Changsheng Xie, Guangxi Zhu
PARLE
1993
15 years 8 months ago
On the Performance of Parallel Join Processing in Shared Nothing Database Systems
: Parallel database systems aim at providing high throughput for OLTP transactions as well as short response times for complex and data-intensive queries. Shared nothing systems re...
Robert Marek, Erhard Rahm
MICRO
2008
IEEE
159views Hardware» more  MICRO 2008»
15 years 10 months ago
A novel cache architecture with enhanced performance and security
—Caches ideally should have low miss rates and short access times, and should be power efficient at the same time. Such design goals are often contradictory in practice. Recent f...
Zhenghong Wang, Ruby B. Lee