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» Efficient Wire Formats for High Performance Computing
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NSDI
2004
15 years 5 months ago
Designing a DHT for Low Latency and High Throughput
Designing a wide-area distributed hash table (DHT) that provides high-throughput and low-latency network storage is a challenge. Existing systems have explored a range of solution...
Frank Dabek, Jinyang Li, Emil Sit, James Robertson...
EUC
2006
Springer
15 years 8 months ago
Dynamic Repartitioning of Real-Time Schedule on a Multicore Processor for Energy Efficiency
Multicore processors promise higher throughput at lower power consumption than single core processors. Thus in the near future they will be widely used in hard real-time systems as...
Euiseong Seo, Yongbon Koo, Joonwon Lee
DAC
2009
ACM
16 years 5 months ago
Provably good and practically efficient algorithms for CMP dummy fill
Abstract--To reduce chip-scale topography variation in Chemical Mechanical Polishing (CMP) process, dummy fill is widely used to improve the layout density uniformity. Previous res...
Chunyang Feng, Hai Zhou, Changhao Yan, Jun Tao, Xu...
ACSC
2008
IEEE
15 years 11 months ago
A Local Broker enabled MobiPass architecture for enhancing trusted interaction efficiency
While mobile computing provides a potentially vast business opportunity for many industry participants, it also raises issues such as security and performance. This paper proposes...
Will Tao, Robert Steele
IPPS
2010
IEEE
15 years 1 months ago
Efficient hardware support for the Partitioned Global Address Space
We present a novel architecture of a communication engine for non-coherent distributed shared memory systems. The shared memory is composed by a set of nodes exporting their memory...
Holger Fröning, Heiner Litz