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» Efficient Wire Formats for High Performance Computing
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PC
2010
111views Management» more  PC 2010»
15 years 2 months ago
Reducing complexity in tree-like computer interconnection networks
The fat-tree is one of the topologies most widely used to build high-performance parallel computers. However, they are expensive and difficult to build. In this paper we propose t...
Javier Navaridas, José Miguel-Alonso, Franc...
EGH
2010
Springer
15 years 2 months ago
AnySL: efficient and portable shading for ray tracing
While a number of different shading languages have been developed, their efficient integration into an existing renderer is notoriously difficult, often boiling down to implementi...
Ralf Karrenberg, Dmitri Rubinstein, Philipp Slusal...
IPPS
2003
IEEE
15 years 9 months ago
Contact-Based Architecture for Resource Discovery (CARD) in Large Scale MANets
In this paper we propose a novel architecture, CARD, for resource discovery in large scale MANets that may scale up to thousands of nodes. Our mechanism is suitable for resource d...
Ahmed Helmy, Saurabh Garg, Priyatham Pamu, Nitin N...
BMCBI
2011
14 years 8 months ago
A Novel And Well-Defined Benchmarking Method For Second Generation Read Mapping
Background: Second generation sequencing technologies yield DNA sequence data at ultra high-throughput. Common to most biological applications is a mapping of the reads to an almo...
Manuel Holtgrewe, Anne-Katrin Emde, David Weese, K...
DAC
2003
ACM
16 years 5 months ago
Pushing ASIC performance in a power envelope
Power dissipation is becoming the most challenging design constraint in nanometer technologies. Among various design implementation schemes, standard cell ASICs offer the best pow...
Ruchir Puri, Leon Stok, John M. Cohn, David S. Kun...