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ICCAD
2003
IEEE
115views Hardware» more  ICCAD 2003»
15 years 6 months ago
Efficient Verification of Hazard-Freedom in Gate-Level Timed Asynchronous Circuits
This paper presents an efficient method for verifying hazard freedom in timed asynchronous circuits. Timed circuits are a class of asynchronous circuits that utilize explicit tim...
Curtis A. Nelson, Chris J. Myers, Tomohiro Yoneda
INFOCOM
2008
IEEE
15 years 4 months ago
An Efficient Identity-Based Batch Verification Scheme for Vehicular Sensor Networks
Chenxi Zhang, Rongxing Lu, Xiaodong Lin, Pin-Han H...
DATE
2006
IEEE
82views Hardware» more  DATE 2006»
15 years 3 months ago
Efficient assertion based verification using TLM
Ali Habibi, Sofiène Tahar, Amer Samarah, Do...
DATE
2005
IEEE
99views Hardware» more  DATE 2005»
15 years 3 months ago
Verification of Embedded Memory Systems using Efficient Memory Modeling
Malay K. Ganai, Aarti Gupta, Pranav Ashar