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598
search results - page 14 / 120
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Efficient and User-Friendly Verification
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ICCAD
2003
IEEE
115
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Hardware
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ICCAD 2003
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Efficient Verification of Hazard-Freedom in Gate-Level Timed Asynchronous Circuits
15 years 6 months ago
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www.async.ece.utah.edu
This paper presents an efficient method for verifying hazard freedom in timed asynchronous circuits. Timed circuits are a class of asynchronous circuits that utilize explicit tim...
Curtis A. Nelson, Chris J. Myers, Tomohiro Yoneda
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65
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DATE
2009
IEEE
95
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Hardware
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DATE 2009
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An efficient path-oriented bitvector encoding width computation algorithm for bit-precise verification
15 years 4 months ago
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www.date-conference.com
Nannan He, Michael S. Hsiao
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48
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INFOCOM
2008
IEEE
154
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Communications
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INFOCOM 2008
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An Efficient Identity-Based Batch Verification Scheme for Vehicular Sensor Networks
15 years 4 months ago
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www.hrl.uoit.ca
Chenxi Zhang, Rongxing Lu, Xiaodong Lin, Pin-Han H...
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40
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DATE
2006
IEEE
82
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Hardware
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DATE 2006
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Efficient assertion based verification using TLM
15 years 3 months ago
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hvg.ece.concordia.ca
Ali Habibi, Sofiène Tahar, Amer Samarah, Do...
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56
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DATE
2005
IEEE
99
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DATE 2005
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Verification of Embedded Memory Systems using Efficient Memory Modeling
15 years 3 months ago
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www.nec-labs.com
Malay K. Ganai, Aarti Gupta, Pranav Ashar
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