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» Efficient and User-Friendly Verification
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EURODAC
1994
IEEE
104views VHDL» more  EURODAC 1994»
15 years 1 months ago
An efficient verification algorithm for parallel controllers
Krzysztof Bilinski, Erik L. Dagless, Jonathan Saul...
ISPEC
2010
Springer
14 years 11 months ago
An Efficient Convertible Undeniable Signature Scheme with Delegatable Verification
Abstract. Undeniable signatures, introduced by Chaum and van Antwerpen, require a verifier to interact with the signer to verify a signature, and hence allow the signer to control ...
Jacob C. N. Schuldt, Kanta Matsuura
IEICET
2010
86views more  IEICET 2010»
14 years 8 months ago
HPChecker: An AMBA AHB On-Chip Bus Protocol Checker with Efficient Verification Mechanisms
Liang-Bi Chen, Jiun-Cheng Ju, Chien-Chou Wang, Ing...
75
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DAC
2003
ACM
15 years 10 months ago
Coverage directed test generation for functional verification using bayesian networks
Functional verification is widely acknowledged as the bottleneck in the hardware design cycle. This paper addresses one of the main challenges of simulation based verification (or...
Shai Fine, Avi Ziv