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CACM
2010
140views more  CACM 2010»
14 years 7 months ago
FastTrack: efficient and precise dynamic race detection
Multithreaded programs are notoriously prone to race conditions. Prior work on dynamic race detectors includes fast but imprecise race detectors that report false alarms, as well ...
Cormac Flanagan, Stephen N. Freund
DAC
2006
ACM
15 years 10 months ago
Synthesis of synchronous elastic architectures
A simple protocol for latency-insensitive design is presented. The main features of the protocol are the efficient implementation of elastic communication channels and the automat...
Jordi Cortadella, Michael Kishinevsky, Bill Grundm...
ISQED
2002
IEEE
175views Hardware» more  ISQED 2002»
15 years 2 months ago
On the Relation between SAT and BDDs for Equivalence Checking
State-of-the-art verification tools are based on efficient operations on Boolean formulas. Traditional manipulation techniques are based on Binary Decision Diagrams (BDDs) and SAT...
Sherief Reda, Rolf Drechsler, Alex Orailoglu
CMSB
2006
Springer
15 years 1 months ago
Compositional Reachability Analysis of Genetic Networks
Genetic regulatory networks have been modeled as discrete transition systems by many approaches, benefiting from a large number of formal verification algorithms available for the ...
Gregor Gößler
FMCAD
2000
Springer
15 years 1 months ago
Model Checking Synchronous Timing Diagrams
Abstract. Model checking is an automated approach to the formal verification of hardware and software. To allow model checking tools to be used by the hardware or software designer...
Nina Amla, E. Allen Emerson, Robert P. Kurshan, Ke...