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» Efficient and User-Friendly Verification
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DAC
2006
ACM
15 years 10 months ago
Predicate learning and selective theory deduction for a difference logic solver
Design and verification of systems at the Register-Transfer (RT) or behavioral level require the ability to reason at higher levels of abstraction. Difference logic consists of an...
Chao Wang, Aarti Gupta, Malay K. Ganai
POPL
2007
ACM
15 years 10 months ago
Types, bytes, and separation logic
We present a formal model of memory that both captures the lowlevel features of C's pointers and memory, and that forms the basis for an expressive implementation of separati...
Harvey Tuch, Gerwin Klein, Michael Norrish
DATE
2003
IEEE
134views Hardware» more  DATE 2003»
15 years 3 months ago
A Multi-Level Design Flow for Incorporating IP Cores: Case Study of 1D Wavelet IP Integration
The design of high performance multimedia systems in a short time force us to use IP's blocks in many designs. However, their correct integration in a design implies more com...
Adel Baganne, Imed Bennour, Mehrez Elmarzougui, Ri...
ACMICEC
2007
ACM
127views ECommerce» more  ACMICEC 2007»
15 years 1 months ago
Symbolic model checking of institutions
Norms defined by institutions and enforced by organizations have been put forward as a mechanism to increase the efficiency and reliability of electronic transactions carried out ...
Francesco Viganò, Marco Colombetti
APSCC
2006
IEEE
14 years 11 months ago
GHIDS: Defending Computational Grids against Misusing of Shared Resources
Detecting intrusions at host level is vital to protecting shared resources in grid, but traditional Host-based Intrusion Detecting System (HIDS) is not suitable for grid environme...
Guofu Feng, Xiaoshe Dong, Weizhe Liu, Ying Chu, Ju...