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» Efficient assertion based verification using TLM
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HASE
2007
IEEE
15 years 6 months ago
On the Verifiability of Programs Written in the Feature Language Extensions
High assurance in embedded system software is difficult to attain. Verification relies on testing. The unreliable and costly testing process is made much worse because the softwar...
Wu-Hon F. Leung
DATE
2006
IEEE
117views Hardware» more  DATE 2006»
15 years 5 months ago
Formal verification of systemc designs using a petri-net based representation
This paper presents an effective approach to formally verify SystemC designs. The approach translates SystemC models into a Petri-Net based representation. The Petri-net model is ...
Daniel Karlsson, Petru Eles, Zebo Peng
FORMATS
2004
Springer
15 years 3 months ago
Modeling and Verification of a Fault-Tolerant Real-Time Startup Protocol Using Calendar Automata
We discuss the modeling and verification of real-time systems using the SAL model checker. A new modeling framework based on event calendars enables dense timed systems to be descr...
Bruno Dutertre, Maria Sorea
ICSE
2008
IEEE-ACM
16 years 19 days ago
Temporal dependency based checkpoint selection for dynamic verification of fixed-time constraints in grid workflow systems
In grid workflow systems, temporal correctness is critical to assure the timely completion of grid workflow execution. To monitor and control the temporal correctness, fixed-time ...
Jinjun Chen, Yun Yang
TCAD
2002
121views more  TCAD 2002»
14 years 11 months ago
Robust Boolean reasoning for equivalence checking and functional property verification
Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analysis require efficient Boolean reasoning for problems derived from circuits...
Andreas Kuehlmann, Viresh Paruthi, Florian Krohm, ...