79 search results - page 10 / 16 » Efficient breadth-first manipulation of binary decision diag... |
DATE
2000
IEEE
15 years 1 months ago
2000
IEEE
The classical solving approach for two-level logic minimisation reduces the problem to a special case of unate covering and attacks the latter with a (possibly limited) branch-and...
ICCD
2001
IEEE
15 years 6 months ago
2001
IEEE
Reduced Ordered Binary Decision Diagrams (BDDs) are a data structure for representation and manipulation of Boolean functions which are frequently used in VLSI Design Automation. ...
104
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VMCAI
2005
Springer
15 years 3 months ago
2005
Springer
Abstract. We present a context-sensitive compositional analysis of information flow for full (mono-threaded) Java bytecode. Our idea consists in transforming the Java bytecode int...
DATE
2002
IEEE
15 years 2 months ago
2002
IEEE
The problem of fault grading for multiple path delay faults is studied and a method of obtaining the exact coverage is presented. The faults covered are represented and manipulate...
ISCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
— Reduced ordered Binary Decision Diagrams (BDDs) are a data structure for efficient representation and manipulation of Boolean functions. They are frequently used in logic synt...