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DSD
2010
IEEE
137views Hardware» more  DSD 2010»
14 years 7 months ago
A C-to-RTL Flow as an Energy Efficient Alternative to Embedded Processors in Digital Systems
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
Sameer D. Sahasrabuddhe, Sreenivas Subramanian, Ku...
ISCAS
2005
IEEE
122views Hardware» more  ISCAS 2005»
15 years 3 months ago
Towards a rigorous formulation of the space mapping technique for engineering design
—This paper deals with the Space Mapping (SM) approach to engineering design optimization. We attempt here a theoretical justification of methods that have already proven efficie...
Slawomir Koziel, John W. Bandler, Kaj Madsen
CSCWD
2009
Springer
15 years 4 months ago
ETM Toolkit: A development tool based on Extended Topic Map
By research on Topic Map standard, the Extended Topic Map (ETM) is proposed as a novel model for better organization and management of the massive knowledge resources in E-learnin...
Lu Jiang, Jun Liu, Zhaohui Wu, Qinghua Zheng, Ya-n...
CGVR
2006
14 years 11 months ago
Interpolation-Friendly Soft Shadow Maps
We present Penumbra Limit Maps, a technique for rendering soft shadows from a modified shadow map. The shadow representation used by our method has excellent interpolation propert...
Orion Sky Lawlor
CHARME
2003
Springer
73views Hardware» more  CHARME 2003»
15 years 1 months ago
Towards Diagrammability and Efficiency in Event Sequence Languages
Industrial verification teams are actively developing suitable event sequence languages for hardware verification. Such languages must be expressive, designer friendly, and hardwar...
Kathi Fisler