214 search results - page 21 / 43 » Efficient bump mapping hardware |
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ISCA
2002
IEEE
14 years 9 months ago
2002
IEEE
In this paper, we consider the tree task graphs which arise from many important programming paradigms such as divide and conquer, branch and bound etc., and the linear task-graphs...
HPCA
2007
IEEE
15 years 10 months ago
2007
IEEE
Memory bugs are a broad class of bugs that is becoming increasingly common with increasing software complexity, and many of these bugs are also security vulnerabilities. Unfortuna...
DSD
2009
IEEE
14 years 7 months ago
2009
IEEE
Abstract--The implementation of an efficient result forwarding unit for asynchronous processors faces the problem of the inherent lack of synchronisation between result producer an...
103
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ERSA
2009
14 years 7 months ago
2009
For a generic flexible efficient array antenna receiver platform a hierarchical reconfigurable tiled architecture has been proposed. The architecture provides a flexible reconfigur...
ASPDAC
2007
ACM
15 years 1 months ago
2007
ACM
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...