214 search results - page 5 / 43 » Efficient bump mapping hardware |
80
Voted
CF
2006
ACM
15 years 1 months ago
2006
ACM
This paper presents our experience mapping OpenMP parallel programming model to the IBM Cyclops-64 (C64) architecture. The C64 employs a many-core-on-a-chip design that integrates...
FPL
2006
Springer
15 years 1 months ago
2006
Springer
Multi-processor architectures have gained interest recently because of their ability to exploit programmable silicon parallelism at acceptable power-efficiency figures. Despite th...
89
Voted
FPL
2010
Springer
14 years 7 months ago
2010
Springer
Due to the continuously decreasing cost of FPGAs, they have become a valid implementation platform for SOCs. Typically, a soft core processor implementation is used to execute the ...
ASPDAC
2010
ACM
14 years 7 months ago
2010
ACM
- In this paper, we propose a novel and global A3MAP (Architecture-Aware Analytic Mapping) algorithm applied to NoC (Networks-on-Chip) based MPSoC (Multi-Processor System-on-Chip) ...
JRTIP
2008
14 years 9 months ago
2008
Abstract Image registration is a computationally intensive application in the medical imaging domain that places stringent requirements on performance and memory management efficie...