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» Efficient checker processor design
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78
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ACMMSP
2004
ACM
92views Hardware» more  ACMMSP 2004»
15 years 3 months ago
Instruction combining for coalescing memory accesses using global code motion
Instruction combining is an optimization to replace a sequence of instructions with a more efficient instruction yielding the same result in a fewer machine cycles. When we use it...
Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatan...
113
Voted
MMDB
2003
ACM
178views Multimedia» more  MMDB 2003»
15 years 2 months ago
Video query processing in the VDBMS testbed for video database research
The increased use of video data sets for multimedia-based applications has created a demand for strong video database support, including efficient methods for handling the content...
Walid G. Aref, Moustafa A. Hammad, Ann Christine C...
ICSE
2003
IEEE-ACM
15 years 2 months ago
A Tutorial on Feature Oriented Programming and Product-Lines
ct Feature Oriented Programming (FOP) is a design methodology and tools for program synthesis. The goal is to specify a target program in terms of the features that it offers, and ...
Don S. Batory
RSP
2000
IEEE
156views Control Systems» more  RSP 2000»
15 years 2 months ago
Quasi-Static Scheduling of Reconfigurable Dataflow Graphs for DSP Systems
Dataflow programming has proven to be popular for representing applications in rapid prototyping tools for digital signal processing (DSP); however, existing dataflow design tools...
Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya
IPPS
1999
IEEE
15 years 1 months ago
Reducing I/O Complexity by Simulating Coarse Grained Parallel Algorithms
Block-wise access to data is a central theme in the design of efficient external memory (EM) algorithms. A second important issue, when more than one disk is present, is fully par...
Frank K. H. A. Dehne, David A. Hutchinson, Anil Ma...