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» Efficient checker processor design
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79
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MICRO
2006
IEEE
88views Hardware» more  MICRO 2006»
14 years 9 months ago
SWICH: A Prototype for Efficient Cache-Level Checkpointing and Rollback
Low-overhead checkpointing and rollback is a popular technique for fault recovery. While different approaches are possible, hardware-supported checkpointing and rollback at the ca...
Radu Teodorescu, Jun Nakano, Josep Torrellas
73
Voted
IPPS
2005
IEEE
15 years 3 months ago
Technology-based Architectural Analysis of Operand Bypass Networks for Efficient Operand Transport
As semiconductor feature sizes decrease, interconnect delay is becoming a dominant component of processor cycle times. This creates a critical need to shift microarchitectural des...
Hongkyu Kim, D. Scott Wills, Linda M. Wills
ICCAD
1998
IEEE
168views Hardware» more  ICCAD 1998»
15 years 1 months ago
On-line scheduling of hard real-time tasks on variable voltage processor
We consider the problem of scheduling the mixed workload of both sporadic (on-line) and periodic (off-line) tasks on variable voltage processor to optimize power consumption while...
Inki Hong, Miodrag Potkonjak, Mani B. Srivastava
WWW
2009
ACM
15 years 10 months ago
Using graphics processors for high performance IR query processing
Web search engines are facing formidable performance challenges as they need to process thousands of queries per second over billions of documents. To deal with this heavy workloa...
Shuai Ding, Jinru He, Hao Yan, Torsten Suel
VLSID
2008
IEEE
133views VLSI» more  VLSID 2008»
15 years 10 months ago
Exhaustive Enumeration of Legal Custom Instructions for Extensible Processors
Today's customizable processors allow the designer to augment the base processor with custom accelerators. By choosing appropriate set of accelerators, designer can significa...
Nagaraju Pothineni, Anshul Kumar, Kolin Paul