544 search results - page 36 / 109 » Efficient checker processor design |
JPDC
2006
14 years 9 months ago
2006
Secure processor architectures enable new sets of applications such as commercial grid computing, software copy protection and secure mobile agents by providing secure computing e...
ICCCN
2007
IEEE
15 years 4 months ago
2007
IEEE
In the past decade cluster computing platforms have been widely applied to support a variety of scientific and commercial applications, many of which are parallel in nature. Howev...
SIGSOFT
2003
ACM
15 years 10 months ago
2003
ACM
Memory corruption errors lead to non-deterministic, elusive crashes. This paper describes ARCHER (ARray CHeckER) a static, effective memory access checker. ARCHER uses path-sensit...
COMCOM
2008
14 years 9 months ago
2008
In this paper, we address the problem of increasing the effectiveness of an intrusion detection system (IDS) for a cluster of nodes in ad hoc networks. To reduce the performance o...
SAC
2010
ACM
14 years 11 months ago
2010
ACM
The control flow of common processors does not match the specific needs of reactive systems. Key issues for these systems are preemption and concurrency, combined with timing pred...