Sciweavers

544 search results - page 37 / 109
» Efficient checker processor design
Sort
View
CAV
2009
Springer
176views Hardware» more  CAV 2009»
15 years 10 months ago
PAT: Towards Flexible Verification under Fairness
Recent development on distributed systems has shown that a variety of fairness constraints (some of which are only recently defined) play vital roles in designing self-stabilizing ...
Jun Sun 0001, Yang Liu 0003, Jin Song Dong, Jun Pa...
CAV
2007
Springer
114views Hardware» more  CAV 2007»
15 years 1 months ago
Configurable Software Verification: Concretizing the Convergence of Model Checking and Program Analysis
In automatic software verification, we have observed a theoretical convergence of model checking and program analysis. In practice, however, model checkers are still mostly concern...
Dirk Beyer, Thomas A. Henzinger, Grégory Th...
FMCAD
2008
Springer
14 years 11 months ago
Recording Synthesis History for Sequential Verification
Performing synthesis and verification in isolation has two undesirable consequences: (1) verification runs the risk of becoming intractable, and (2) strong sequential optimization...
Alan Mishchenko, Robert K. Brayton
ASPDAC
2001
ACM
73views Hardware» more  ASPDAC 2001»
15 years 1 months ago
Timed circuits: a new paradigm for high-speed design
Abstract-- In order to continue to produce circuits of increasing speeds, designers must consider aggressive circuit design styles such as self-resetting or delayed-reset domino ci...
Chris J. Myers, Wendy Belluomini, Kip Kallpack, Er...
SIGSOFT
2003
ACM
15 years 10 months ago
Bogor: an extensible and highly-modular software model checking framework
Model checking is emerging as a popular technology for reasoning about behavioral properties of a wide variety of software artifacts including: requirements models, architectural ...
Robby, Matthew B. Dwyer, John Hatcliff