Sciweavers

544 search results - page 39 / 109
» Efficient checker processor design
Sort
View
ICS
2007
Tsinghua U.
15 years 3 months ago
An L2-miss-driven early register deallocation for SMT processors
The register file is one of the most critical datapath components limiting the number of threads that can be supported on a Simultaneous Multithreading (SMT) processor. To allow t...
Joseph J. Sharkey, Dmitry V. Ponomarev
CODES
2006
IEEE
14 years 11 months ago
Architectural support for safe software execution on embedded processors
The lack of memory safety in many popular programming languages, including C and C++, has been a cause for great concern in the realm of software reliability, verification, and mo...
Divya Arora, Anand Raghunathan, Srivaths Ravi, Nir...
ACL
1998
14 years 11 months ago
A Text Input Front-end Processor as an Information Access Platform
This paper presents a practical foreign language writing support tool which makes it much easier to utilize dictionary and example sentence resources. Like a Kana-Kanji conversion...
Shinichi Doi, Shin-ichiro Kamei, Kiyoshi Yamabana
CASES
2008
ACM
14 years 11 months ago
Efficient vectorization of SIMD programs with non-aligned and irregular data access hardware
Automatic vectorization of programs for partitioned-ALU SIMD (Single Instruction Multiple Data) processors has been difficult because of not only data dependency issues but also n...
Hoseok Chang, Wonyong Sung
RTSS
1998
IEEE
15 years 2 months ago
Synthesis Techniques for Low-Power Hard Real-Time Systems on Variable Voltage Processors
The energy efficiency of systems-on-a-chip can be much improved if one were to vary the supply voltage dynamically at run time. In this paper we describe the synthesis of systems-...
Inki Hong, Gang Qu, Miodrag Potkonjak, Mani B. Sri...