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» Efficient checker processor design
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MASCOTS
2008
14 years 11 months ago
Optimizing Galois Field Arithmetic for Diverse Processor Architectures and Applications
Galois field implementations are central to the design of many reliable and secure systems, with many systems implementing them in software. The two most common Galois field opera...
Kevin M. Greenan, Ethan L. Miller, Thomas J. E. Sc...
ISPAN
1997
IEEE
15 years 1 months ago
CASS: an efficient task management system for distributed memory architectures
The thesis of this research is that the task of exposing the parallelism in a given application should be left to the algorithm designer, who has intimate knowledge of the applica...
Jing-Chiou Liou, Michael A. Palis
DAC
2009
ACM
15 years 4 months ago
Beyond verification: leveraging formal for debugging
The latest advancements in the commercial formal model checkers have enabled the integration of formal property verification with the conventional testbench based methods in the o...
Rajeev K. Ranjan, Claudionor Coelho, Sebastian Ska...
DAC
2007
ACM
15 years 10 months ago
Design Methodology for Pipelined Heterogeneous Multiprocessor System
Multiprocessor SoC systems have led to the increasing use of parallel hardware along with the associated software. These approaches have included coprocessor, homogeneous processo...
Seng Lin Shee, Sri Parameswaran
FROCOS
2005
Springer
15 years 3 months ago
Combination of Isabelle/HOL with Automatic Tools
We describe results and status of a sub project of the Verisoft [1] project. While the Verisoft project aims at verification of a complete computer system starting with hardware a...
Sergey Tverdyshev