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» Efficient checker processor design
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RTA
2010
Springer
15 years 1 months ago
Certified Subterm Criterion and Certified Usable Rules
Abstract. In this paper we present our formalization of two important termination techniques for term rewrite systems: the subterm criterion and the reduction pair processor in com...
Christian Sternagel, René Thiemann
ATC
2008
Springer
14 years 11 months ago
Concepts for Autonomous Control Flow Checking for Embedded CPUs
In this paper, we introduce new concepts and methods for checking the correctness of control flow instructions during the execution of programs in embedded CPUs. Detecting and avoi...
Daniel Ziener, Jürgen Teich
TVLSI
2008
152views more  TVLSI 2008»
14 years 9 months ago
MMV: A Metamodeling Based Microprocessor Validation Environment
With increasing levels of integration of multiple processing cores and new features to support software functionality, recent generations of microprocessors face difficult validati...
Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Di...
DSN
2011
IEEE
13 years 9 months ago
Cross-layer resilience using wearout aware design flow
—As process technology shrinks devices, circuits experience accelerated wearout. Monitoring wearout will be critical for improving the efficiency of error detection and correctio...
Bardia Zandian, Murali Annavaram
ANCS
2006
ACM
15 years 3 months ago
Design of a web switch in a reconfigurable platform
The increase of the web traffic has created the need for web switches that are able to balance the traffic to the server farms based on their contents (e.g. layer 7 switching). In...
Christoforos Kachris, Stamatis Vassiliadis