544 search results - page 47 / 109 » Efficient checker processor design |
CPHYSICS
2006
14 years 9 months ago
2006
Progress in adapting molecular dynamics algorithms for systems with short-range interactions to utilize the features of modern supercomputers is described. Efficient utilization o...
SAC
2008
ACM
14 years 9 months ago
2008
ACM
This paper proposes an address compression technique for load/store queue (LSQ) to improve the scalability and power efficiency. A load/store queue (LSQ) typically needs a fullyas...
ISLPED
2003
ACM
15 years 3 months ago
2003
ACM
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
DAC
2004
ACM
15 years 10 months ago
2004
ACM
Architecture description languages (ADL) have been established to aid the design of application-specific instruction-set processors (ASIP). Their main contribution is the automati...
MICRO
2007
IEEE
15 years 4 months ago
2007
IEEE
Program runtime characteristics exhibit significant variation. As microprocessor architectures become more complex, their efficiency depends on the capability of adapting with wor...