544 search results - page 48 / 109 » Efficient checker processor design |
SPAA
2005
ACM
15 years 3 months ago
2005
ACM
One approach in verifying the correctness of a multiprocessor system is to show that its execution results comply with the memory consistency model it is meant to implement. It ha...
DAC
2005
ACM
15 years 10 months ago
2005
ACM
Current Application Specific Instruction set Processor (ASIP) design methodologies are mostly based on iterative architecture exploration that uses Architecture Description Langua...
DATE
2003
IEEE
15 years 3 months ago
2003
IEEE
On-chip communication design includes designing software (SW) parts (operating system, device drivers, interrupt service routines, etc.) as well as hardware (HW) parts (on-chip co...
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FPGA
1995
ACM
15 years 1 months ago
1995
ACM
Recent advances in Field-Programmable Gate Arrays (FPGA) and programmable interconnects have made it possible to build efficient hardware emulation engines. In addition, improveme...
VLSID
2008
IEEE
15 years 10 months ago
2008
IEEE
In the automatic design of custom instruction set processors, there can be a very large set of potential custom instructions, from which a few instructions are required to be chos...