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MICRO
2010
IEEE
173views Hardware» more  MICRO 2010»
14 years 7 months ago
Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?
To extend the exponential performance scaling of future chip multiprocessors, improving energy efficiency has become a first-class priority. Single-chip heterogeneous computing ha...
Eric S. Chung, Peter A. Milder, James C. Hoe, Ken ...
PPOPP
2009
ACM
15 years 10 months ago
An efficient transactional memory algorithm for computing minimum spanning forest of sparse graphs
Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...
Seunghwa Kang, David A. Bader
54
Voted
ICTAI
2006
IEEE
15 years 3 months ago
Efficient Search Using Bitboard Models
This paper shows a way to speed up search by using an encoding at bit level to model a particular domain. A bitboard is an unsigned integer whose bits have been given an interpret...
Pablo San Segundo, Ramón Galán, Fern...
ISCA
1997
IEEE
93views Hardware» more  ISCA 1997»
15 years 1 months ago
The Energy Efficiency of IRAM Architectures
Portable systems demand energy efficiency in order to maximize battery life. IRAM architectures, which combine DRAM and a processor on the same chip in a DRAM process, are more en...
Richard Fromm, Stylianos Perissakis, Neal Cardwell...
FPL
2007
Springer
97views Hardware» more  FPL 2007»
15 years 1 months ago
An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems
Recently, there is a surge of interests in using FPGAs for computer architecture research including applications from emulating and analyzing a new platform to accelerating microa...
Taeweon Suh, Shih-Lien Lu, Hsien-Hsin S. Lee