Sciweavers

544 search results - page 63 / 109
» Efficient checker processor design
Sort
View
BMCBI
2010
139views more  BMCBI 2010»
14 years 10 months ago
A highly efficient multi-core algorithm for clustering extremely large datasets
Background: In recent years, the demand for computational power in computational biology has increased due to rapidly growing data sets from microarray and other high-throughput t...
Johann M. Kraus, Hans A. Kestler
CASES
2006
ACM
15 years 1 months ago
Reaching fast code faster: using modeling for efficient software thread integration on a VLIW DSP
When integrating software threads together to boost performance on a processor with instruction-level parallel processing support, it is rarely clear which code regions should be ...
Won So, Alexander G. Dean
CF
2006
ACM
15 years 1 months ago
Landing openMP on cyclops-64: an efficient mapping of openMP to a many-core system-on-a-chip
This paper presents our experience mapping OpenMP parallel programming model to the IBM Cyclops-64 (C64) architecture. The C64 employs a many-core-on-a-chip design that integrates...
Juan del Cuvillo, Weirong Zhu, Guang R. Gao
ALT
1997
Springer
15 years 1 months ago
Learning One-Variable Pattern Languages Very Efficiently on Average, in Parallel, and by Asking Queries
A pattern is a string of constant and variable symbols. The language generated by a pattern is the set of all strings of constant symbols which can be obtained from by substituti...
Thomas Erlebach, Peter Rossmanith, Hans Stadtherr,...
103
Voted
ASPLOS
2010
ACM
15 years 1 months ago
Micro-pages: increasing DRAM efficiency with locality-aware data placement
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...
Kshitij Sudan, Niladrish Chatterjee, David Nellans...