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AHS
2007
IEEE
349views Hardware» more  AHS 2007»
15 years 4 months ago
A Low Power Implementation of H.264 Adaptive Deblocking Filter Algorithm
In this paper, we present a low power implementation of H.264 adaptive deblocking filter (DBF) algorithm on ARM Versatile / PB926EJ-S Development Board. The DBF hardware is implem...
Mustafa Parlak, Ilker Hamzaoglu
ISCA
2005
IEEE
115views Hardware» more  ISCA 2005»
15 years 3 months ago
The V-Way Cache: Demand Based Associativity via Global Replacement
As processor speeds increase and memory latency becomes more critical, intelligent design and management of secondary caches becomes increasingly important. The efficiency of curr...
Moinuddin K. Qureshi, David Thompson, Yale N. Patt
ISCAS
2005
IEEE
99views Hardware» more  ISCAS 2005»
15 years 3 months ago
On the implementation of 128-pt FFT/IFFT for high-performance WPAN
- This paper deals with the efficient realization of a 128-pt FFT/IFFT processor for application in IEEE 802.15.3a standard. The 128-pt FFT/IFFT architecture has been designed by d...
C. Huggett, K. Maharatna, K. Paul
DATE
2003
IEEE
123views Hardware» more  DATE 2003»
15 years 3 months ago
Parallel Processing Architectures for Reconfigurable Systems
Novel reconfigurable computing architectures exploit the inherent parallelism available in many signalprocessing problems. These architectures often consist of networks of compute...
Kees A. Vissers
IPPS
2003
IEEE
15 years 3 months ago
Parallel Direct Solution of Linear Equations on FPGA-Based Machines
The efficient solution of large systems of linear equations represented by sparse matrices appears in many tasks. LU factorization followed by backward and forward substitutions i...
Xiaofang Wang, Sotirios G. Ziavras