544 search results - page 90 / 109 » Efficient checker processor design |
80
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MICRO
2010
IEEE
14 years 7 months ago
2010
IEEE
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address thes...
TECS
2008
14 years 9 months ago
2008
tion. Transaction Level Modeling (TLM) has been proposed to abstract communication for highspeed system simulation and rapid design space exploration. Although being widely accepte...
ICS
2009
Tsinghua U.
15 years 2 months ago
2009
Tsinghua U.
ABSTRACT Because of technology advances power consumption has emerged up as an important design issue in modern high-performance microprocessors. As a consequence, research on redu...
JSA
2008
14 years 9 months ago
2008
Commercial designs are currently integrating from 10 to 100 embedded processors in a single system on chip (SoC) and the number is likely to increase significantly in the near fut...
102
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JSA
2010
14 years 4 months ago
2010
During the past few years, embedded digital systems have been requested to provide a huge amount of processing power and functionality. A very likely foreseeable step to pursue th...