544 search results - page 91 / 109 » Efficient checker processor design |
DAC
2010
ACM
14 years 10 months ago
2010
ACM
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
66
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ICIP
2007
IEEE
15 years 11 months ago
2007
IEEE
The in-loop deblocking filter contains highly adaptive processing on both sample level and block edge level, which inevitably appears in the loop kernel of the algorithm. Therefor...
DAC
2007
ACM
15 years 10 months ago
2007
ACM
Abstract. Embedded multimedia systems often run multiple time-constrained applications simultaneously. These systems use multiprocessor systems-on-chip of which it must be guarante...
179
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POPL
2007
ACM
15 years 10 months ago
2007
ACM
Constraint Handling Rules (CHR) is a concurrent committedchoice constraint logic programming language to describe transformations (rewritings) among multi-sets of constraints (ato...
PDP
2009
IEEE
15 years 4 months ago
2009
IEEE
Abstract—Execution of applications on upcoming highperformance computing (HPC) systems introduces a variety of new challenges and amplifies many existing ones. These systems will...