555 search results - page 24 / 111 » Efficient event-driven simulation of parallel processor arch... |
JEC
2006
14 years 9 months ago
2006
We present an overview of the Synchroscalar single-chip, multi-core processor. Through the design of Synchroscalar, we find that high energy efficiency and low complexity can be a...
CODES
2006
IEEE
14 years 11 months ago
2006
IEEE
The lack of memory safety in many popular programming languages, including C and C++, has been a cause for great concern in the realm of software reliability, verification, and mo...
ISSS
2002
IEEE
15 years 2 months ago
2002
IEEE
Modeling for synthesis and modeling for simulation seem to be two competing goals in the context of C++-based modeling frameworks. One of the reasons is while most hardware system...
VISUALIZATION
1998
IEEE
15 years 2 months ago
1998
IEEE
This paper presents efficient image-based rendering techniques used in the context of an architectural walkthrough system. Portals (doors and windows) are rendered by warping laye...
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WAE
2001
14 years 11 months ago
2001
The ability to provide uniform shared-memory access to a significant number of processors in a single SMP node brings us much closer to the ideal PRAM parallel computer. In this pa...