555 search results - page 31 / 111 » Efficient event-driven simulation of parallel processor arch... |
CF
2008
ACM
14 years 12 months ago
2008
ACM
PRAM (Parallel Random Access Model) has been widely regarded a desirable parallel machine model for many years, but it is also believed to be "impossible in reality." As...
DAC
2001
ACM
15 years 11 months ago
2001
ACM
New application-focused system-on-chip platforms motivate new application-specific processors. Configurable and extensible processor architectures offer the efficiency of tuned lo...
EUROPAR
2010
Springer
14 years 11 months ago
2010
Springer
Abstract. Performance of the on-chip cache is critical for processor. The multithread program model usually employed by on-chip many-core architectures may have effects on cache ac...
AINA
2007
IEEE
15 years 4 months ago
2007
IEEE
Continuous improvements in integration scale have made major microprocessor vendors to move to designs that integrate several processor cores on the same chip. Chip-multiprocessor...
PPOPP
2003
ACM
15 years 3 months ago
2003
ACM
In an intelligent memory architecture, the main memory of a computer is enhanced with many simple processors. The result is a highly-parallel, heterogeneous machine that is able t...