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ISCA
1997
IEEE
93views Hardware» more  ISCA 1997»
15 years 1 months ago
The Energy Efficiency of IRAM Architectures
Portable systems demand energy efficiency in order to maximize battery life. IRAM architectures, which combine DRAM and a processor on the same chip in a DRAM process, are more en...
Richard Fromm, Stylianos Perissakis, Neal Cardwell...
82
Voted
EUROPAR
2006
Springer
15 years 1 months ago
Supporting Reconfigurable Parallel Multimedia Applications
Abstract. Programming multimedia applications for System-on-Chip (SoC) architectures is difficult because streaming communication, user event handling, reconfiguration, and paralle...
Maik Nijhuis, Herbert Bos, Henri E. Bal
IAJIT
2010
140views more  IAJIT 2010»
14 years 8 months ago
HW/SW Design-Based Implementation of Vector Median Rational Hybrid Filter
: A new code sign implementation of vector median rational hybrid filter based on efficient hardware/software implementation is introduced and applied to colour image filtering pro...
Anis Boudabous, Ahmed Ben Atitallah, Lazhar Khriji...
KDD
2008
ACM
186views Data Mining» more  KDD 2008»
15 years 10 months ago
Cut-and-stitch: efficient parallel learning of linear dynamical systems on smps
Multi-core processors with ever increasing number of cores per chip are becoming prevalent in modern parallel computing. Our goal is to make use of the multi-core as well as multi...
Lei Li, Wenjie Fu, Fan Guo, Todd C. Mowry, Christo...
IPPS
2008
IEEE
15 years 4 months ago
Modeling and analysis of power in multicore network processors
With the emergence of multicore network processors in support of high-performance computing and networking applications, power consumption has become a problem of increasing signi...
S. Huang, Y. Luo, W. Feng