555 search results - page 53 / 111 » Efficient event-driven simulation of parallel processor arch... |
FCCM
2009
IEEE
15 years 4 months ago
2009
IEEE
Although soft microprocessors are widely used in FPGAs, limited work has been performed regarding how to automatically and efficiently generate soft multiprocessors. In this paper...
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ISCA
2006
IEEE
14 years 10 months ago
2006
IEEE
Packet-based on-chip networks are increasingly being adopted in complex System-on-Chip (SoC) designs supporting numerous homogeneous and heterogeneous functional blocks. These Net...
ICCS
2005
Springer
15 years 3 months ago
2005
Springer
The development of efficient parallel algorithms for large scale wildfire simulations is a challenging research problem because the factors that determine wildfire behavior are com...
ISCA
2010
IEEE
15 years 1 months ago
2010
IEEE
GPU architectures are increasingly important in the multi-core era due to their high number of parallel processors. Performance optimization for multi-core processors has been a c...
CASES
2008
ACM
14 years 12 months ago
2008
ACM
Interconnects based on Networks-on-Chip are an appealing solution to address future microprocessor designs where, very likely, hundreds of cores will be connected on a single chip...