555 search results - page 58 / 111 » Efficient event-driven simulation of parallel processor arch... |
ICS
2003
Tsinghua U.
15 years 3 months ago
2003
Tsinghua U.
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...
HPCA
2008
IEEE
15 years 10 months ago
2008
IEEE
The continued scaling of device dimensions and the operating voltage reduces the critical charge and thus natural noise tolerance level of transistors. As a result, circuits can p...
FPGA
2004
ACM
15 years 3 months ago
2004
ACM
The speedup over a microprocessor that can be achieved by implementing some programs on an FPGA has been extensively reported. This paper presents an analysis, both quantitative a...
APPT
2007
Springer
14 years 11 months ago
2007
Springer
Dynamic programming is a widely applied algorithm design technique in many areas such as computational biology and scientific computing. Typical applications using this technique a...
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...