555 search results - page 60 / 111 » Efficient event-driven simulation of parallel processor arch... |
SAMOS
2009
Springer
15 years 4 months ago
2009
Springer
We believe that future many-core architectures should support a simple and scalable way to execute many threads that are generated by parallel programs. A good candidate to impleme...
ASPLOS
2008
ACM
14 years 12 months ago
2008
ACM
Recently, the number of cores on general-purpose processors has been increasing rapidly. Using conventional programming models, it is challenging to effectively exploit these core...
IPPS
2008
IEEE
15 years 4 months ago
2008
IEEE
Packet classification is an important function in a router’s line-card. Although many excellent solutions have been proposed in the past, implementing high speed packet classifi...
PLDI
1995
ACM
15 years 1 months ago
1995
ACM
Traditional list schedulers order instructions based on an optimistic estimate of the load latency imposed by the hardware and therefore cannot respond to variations in memory lat...
CF
2010
ACM
15 years 1 months ago
2010
ACM
: The SpiNNaker machine is a massively parallel computing system, consisting of 1,000,000 cores. From one perspective, it has a place in Flynns' taxonomy: it is a straightforw...