555 search results - page 61 / 111 » Efficient event-driven simulation of parallel processor arch... |
CPHYSICS
2010
14 years 10 months ago
2010
In this paper, a programming model is presented which enables scalable parallel performance on multi-core shared memory architectures. The model has been developed for application...
DAC
2009
ACM
15 years 11 months ago
2009
ACM
Computational complexity has been the primary challenge of many VLSI CAD applications. The emerging multicore and manycore microprocessors have the potential to offer scalable perf...
SIGOPS
2008
14 years 10 months ago
2008
This paper presents PipesFS, an I/O architecture for Linux 2.6 that increases I/O throughput and adds support for heterogeneous parallel processors by (1) collapsing many I/O inte...
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IPPS
2002
IEEE
15 years 2 months ago
2002
IEEE
In this paper we propose an efficient real-time communication mechanism for distributed vision processing. One of the biggest problems of distributed vision processing, as is the ...
HPCA
2003
IEEE
15 years 10 months ago
2003
IEEE
We present an active switch architecture to improve the performance of systems connected via system area networks. Our programmable active switches not only flexibly route packets...