555 search results - page 65 / 111 » Efficient event-driven simulation of parallel processor arch... |
DELTA
2010
IEEE
15 years 3 months ago
2010
IEEE
High level hardware description languages aim to make hardware design more like programming software. These languages are often used to accelerate legacy software algorithms by ...
Publication
Continuing improvements in CPU and GPU performances as well as increasing multi-core processor and cluster-based parallelism demand for flexible and scalable parallel rendering sol...
VLSID
2008
IEEE
15 years 10 months ago
2008
IEEE
Simultaneous Multi-Threading (SMT) processors are becoming popular because they exploit both instruction-level and threadlevel parallelism by issuing instructions from different t...
103
click to vote
SASP
2009
IEEE
15 years 4 months ago
2009
IEEE
— As growing power dissipation and thermal effects disrupted the rising clock frequency trend and threatened to annul Moore’s law, the computing industry has switched its route...
HPCA
2005
IEEE
15 years 10 months ago
2005
IEEE
Dynamic voltage and frequency scaling (DVFS) is a widely-used method for energy-efficient computing. In this paper, we present a new intra-task online DVFS scheme for multiple clo...