555 search results - page 66 / 111 » Efficient event-driven simulation of parallel processor arch... |
HPCA
2009
IEEE
15 years 10 months ago
2009
IEEE
Growing concerns about power have revived interest in in-order pipelines. In-order pipelines sacrifice single-thread performance. Specifically, they do not allow execution to flow...
DATE
2003
IEEE
15 years 3 months ago
2003
IEEE
This paper presents a new algorithm for on-the-fly data compression in high performance VLIW processors. The algorithm aggressively targets energy minimization of some of the domi...
DAC
2009
ACM
15 years 11 months ago
2009
ACM
Logic simulation is a critical component of the design tool flow in modern hardware development efforts. It is used widely ? from high-level descriptions down to gate-level ones ?...
PAAMS
2010
Springer
14 years 8 months ago
2010
Springer
The huge number of cores existing in current Graphics Processor Units (GPUs) provides these devices with computing capabilities that can be exploited by distributed applications. I...
HPCA
2005
IEEE
15 years 10 months ago
2005
IEEE
Due to the simulation time of the reference input set, architects often use alternative simulation techniques. Although these alternatives reduce the simulation time, what has not...