555 search results - page 83 / 111 » Efficient event-driven simulation of parallel processor arch... |
HPCA
2002
IEEE
15 years 10 months ago
2002
IEEE
This paper explores the concept of micro-architectural loops and discusses their impact on processor pipelines. In particular, we establish the relationship between loose loops an...
MICRO
2003
IEEE
15 years 3 months ago
2003
IEEE
Energy-efficient processor design is becoming more and more important with technology scaling and with high performance requirements. Supply-voltage scaling is an efficient way to...
EAGC
2004
Springer
15 years 3 months ago
2004
Springer
One of the goals of the EU CrossGrid project is to provide a basis for supporting the efficient execution of parallel and interactive applications on Grid environments. CrossGrid j...
HPCA
2009
IEEE
15 years 10 months ago
2009
IEEE
Cache hierarchies in future many-core processors are expected to grow in size and contribute a large fraction of overall processor power and performance. In this paper, we postula...
ECOOP
2008
Springer
14 years 11 months ago
2008
Springer
Abstract. The paradigm shift in processor design from monolithic processors to multicore has renewed interest in programming models that facilitate parallelism. While multicores ar...