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IESS
2009
Springer
182views Hardware» more  IESS 2009»
14 years 7 months ago
Modeling Cache Effects at the Transaction Level
Abstract. Embedded system design complexities are growing exponentially. Demand has increased for modeling techniques that can provide both accurate measurements of delay and fast ...
Ardavan Pedram, David Craven, Andreas Gerstlauer
TKDE
1998
122views more  TKDE 1998»
14 years 9 months ago
The Design and Implementation of Seeded Trees: An Efficient Method for Spatial Joins
—Existing methods for spatial joins require pre-existing spatial indices or other precomputation, but such approaches are inefficient and limited in generality. Operand data sets...
Ming-Ling Lo, Chinya V. Ravishankar
SAMOS
2007
Springer
15 years 3 months ago
Communication Architecture Simulation on the Virtual Synchronization Framework
As multi-processor system-on-chip (MPSoC) has become an effective solution to ever-increasing design complexity of modern embedded systems, fast and accurate HW/SW cosimulation of...
Taewook Oh, Youngmin Yi, Soonhoi Ha
LCTRTS
1998
Springer
15 years 1 months ago
A Design Environment for Counterflow Pipeline Synthesis
The Counterflow Pipeline (CFP) organization may be a good target for synthesis of application-specific microprocessors for embedded systems because it has a regular and simple str...
Bruce R. Childers, Jack W. Davidson
ICRA
2010
IEEE
142views Robotics» more  ICRA 2010»
14 years 8 months ago
A quadratic regulator-based heuristic for rapidly exploring state space
Abstract— Kinodynamic planning algorithms like RapidlyExploring Randomized Trees (RRTs) hold the promise of finding feasible trajectories for rich dynamical systems with complex...
Elena Leah Glassman, Russ Tedrake