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CODES
2005
IEEE
15 years 3 months ago
Memory access optimizations in instruction-set simulators
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
Mehrdad Reshadi, Prabhat Mishra
IISWC
2008
IEEE
15 years 4 months ago
Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesis
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
Clay Hughes, Tao Li
ICDCS
2008
IEEE
15 years 4 months ago
Measurement Manipulation and Space Selection in Network Coordinates
Internet coordinate systems have emerged as an efficient method to estimate the latency between pairs of nodes without any communication between them. However, most coordinate sy...
Cristian Lumezanu, Neil Spring
ESTIMEDIA
2008
Springer
14 years 11 months ago
Serialized multitasking code generation from dataflow specification
This paper is concerned about multitasking embedded software development from the system specification to the final implementation including design space exploration(DSE). In the ...
Seongnam Kwon, Soonhoi Ha
DATE
2007
IEEE
102views Hardware» more  DATE 2007»
15 years 4 months ago
Efficient testbench code synthesis for a hardware emulator system
: - The rising complexity of modern embedded systems is causing a significant increase in the verification effort required by hardware designers and software developers, leading to...
Ioannis Mavroidis, Ioannis Papaefstathiou