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LCTRTS
2007
Springer
15 years 3 months ago
Integrated CPU and l2 cache voltage scaling using machine learning
Embedded systems serve an emerging and diverse set of applications. As a result, more computational and storage capabilities are added to accommodate ever more demanding applicati...
Nevine AbouGhazaleh, Alexandre Ferreira, Cosmin Ru...
ICCD
1999
IEEE
122views Hardware» more  ICCD 1999»
15 years 1 months ago
Design and Evaluation of a Selective Compressed Memory System
This research explores any potential for an on-chip cache compression which can reduce not only cache miss ratio but also miss penalty, if main memory is also managed in compresse...
Jang-Soo Lee, Won-Kee Hong, Shin-Dug Kim
79
Voted
SAC
2009
ACM
15 years 4 months ago
Music retrieval based on a multi-samples selection strategy for support vector machine active learning
In active learning based music retrieval systems, providing multiple samples to the user for feedback is very necessary. In this paper, we present a new multi-samples selection st...
Tian-Jiang Wang, Gang Chen, Perfecto Herrera
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
15 years 1 months ago
Improving coverage analysis and test generation for large designs
State space techniques have proven to be useful for measuring and improving the coverage of test vectors that are used during functional validation via simulation. By comparing th...
Jules P. Bergmann, Mark Horowitz
ASAP
2005
IEEE
121views Hardware» more  ASAP 2005»
15 years 3 months ago
Using TLM for Exploring Bus-based SoC Communication Architectures
As billion transistor System-on-chips (SoC) become commonplace and design complexity continues to increase, designers are faced with the daunting task of meeting escalating design...
Sudeep Pasricha, Mohamed Ben-Romdhane