135 search results - page 14 / 27 » Efficient tree topology for FPGA interconnect network |
DAC
2006
ACM
15 years 1 months ago
2006
ACM
Conventionally, signal net routing is almost always implemented as Steiner trees. However, non-tree topology is often superior on timing performance as well as tolerance to open f...
INFOCOM
2008
IEEE
15 years 4 months ago
2008
IEEE
Abstract—In order to improve scalability and reduce maintenance overhead for structured Peer-to-Peer systems, researchers design optimal architectures with constant degree and lo...
DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
Current Systems-On-Chip (SoC) execute applications that demand extensive parallel processing. Networks-OnChip (NoC) provide a structured way of realizing interconnections on silic...
ISCAS
2005
IEEE
15 years 3 months ago
2005
IEEE
— Current Systems-On-Chip execute applications that demand extensive parallel processing. Networks-On-Chip (NoC) provide a structured way of realizing interconnections on silicon...
HPCA
2009
IEEE
15 years 4 months ago
2009
IEEE
On-network hardware support for multi-destination traffic is a desirable feature in most multiprocessor machines. Multicast hardware capabilities enable much more effective bandwi...