135 search results - page 8 / 27 » Efficient tree topology for FPGA interconnect network |
IPPS
1996
IEEE
15 years 1 months ago
1996
IEEE
To expand the Scalable Coherent Interface's (SCI) capabilities so it can be used to efficiently handle sharing in systems of hundreds or even thousands of processors, the SCI...
FPL
2008
Springer
14 years 11 months ago
2008
Springer
Abstract-The network on chip will become a future general purpose interconnect for FPGAs much like today's standard OPB or PLB bus architectures. However, performance characte...
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HPCA
2003
IEEE
15 years 10 months ago
2003
IEEE
As the level of chip integration continues to advance at a fast pace, the desire for efficient interconnects-whether on-chip or off-chip--is rapidly increasing. Traditional interc...
INFOCOM
2003
IEEE
15 years 3 months ago
2003
IEEE
—In this paper, we formulate an optimization problem for the design of light-tree based logical topology in Wavelength Division Multiplexing (WDM) networks. The problem is compri...
SNPD
2007
14 years 11 months ago
2007
In this paper, we propose a new class of interconnection networks, called “biswapped networks” (BSNs). Each BSN is built of 2n copies of some n-node basis network using a simp...