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VLSID
2007
IEEE
108views VLSI» more  VLSID 2007»
16 years 4 months ago
Soft Error Rate Analysis for Combinational Logic Using An Accurate Electrical Masking Model
Accurate electrical masking modeling represents a significant challenge in soft error rate analysis for combinational logic circuits. In this paper, we use table lookup MOSFET mode...
Feng Wang 0004, Yuan Xie, R. Rajaraman, Balaji Vai...
DATE
1999
IEEE
102views Hardware» more  DATE 1999»
15 years 8 months ago
Minimal Length Diagnostic Tests for Analog Circuits using Test History
In this paper we propose an efficient transient test generation method to comprehensively test analog circuits using minimum test time. A divide and conquer strategy is formulated...
Alfred V. Gomes, Abhijit Chatterjee
ITC
1996
IEEE
98views Hardware» more  ITC 1996»
15 years 8 months ago
Mixed-Mode BIST Using Embedded Processors
Abstract. In complex systems, embedded processors may be used to run software routines for test pattern generation and response evaluation. For system components which are not comp...
Sybille Hellebrand, Hans-Joachim Wunderlich, Andre...
IWEC
2004
15 years 5 months ago
From Artistry to Automation: A Structured Methodology for Procedural Content Creation
Procedural techniques will soon automate many aspects of content creation for computer games. We describe an efficient, deterministic, methodology for procedurally generating 3D ga...
Timothy Roden, Ian Parberry
TITS
2002
80views more  TITS 2002»
15 years 4 months ago
Toward vision-based intelligent navigator: its concept and prototype
This paper proposes a novel concept of intelligent navigator that can give the driver timely advice on safe and efficient driving. From both the current traffic condition obtained ...
Jun Miura, Motokuni Itoh, Yoshiaki Shirai