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ATS
1998
IEEE
91views Hardware» more  ATS 1998»
15 years 8 months ago
Special ATPG to Correlate Test Patterns for Low-Overhead Mixed-Mode BIST
In mixed-mode BIST, deterministic test patterns are generated with on-chip hardware to detect the random-pattern-resistant (r.p.r.) faults that are missed by the pseudo-random pat...
Madhavi Karkala, Nur A. Touba, Hans-Joachim Wunder...
CICLING
2010
Springer
15 years 7 months ago
Systematic Processing of Long Sentences in Rule Based Portuguese-Chinese Machine Translation
The translation quality and parsing efficiency are often disappointed when Rule based Machine Translation systems deal with long sentences. Due to the complicated syntactic structu...
Francisco Oliveira, Fai Wong, Iok-Sai Hong
ECR
2002
160views more  ECR 2002»
15 years 4 months ago
A New Micro-Payment System Using General Payword Chain
In recent years electronic commerce has grown rapidly as Internet and web technologies have progressed. Therefore, a secure and efficient payment system for general-purpose applic...
Ching-Te Wang, Chin-Chen Chang, Chu-Hsing Lin
ICIP
2004
IEEE
16 years 6 months ago
Rate-distortion analysis of random access for compressed light fields
Image-based rendering data sets, such as light fields, require efficient compression due to their large data size, but also easy random access when rendering from the data set. Ef...
Prashant Ramanathan, Bernd Girod
VLSID
2006
IEEE
144views VLSI» more  VLSID 2006»
16 years 4 months ago
A High-Performance VLSI Architecture for Advanced Encryption Standard (AES) Algorithm
In this paper we present a high-performance, high throughput, and area efficient architecture for the VLSI implementation of the AES algorithm. The subkeys, required for each round...
Naga M. Kosaraju, Murali R. Varanasi, Saraju P. Mo...